ngtv = next generation tv
ngcas = next generation capture and store
its the standard for mpeg 4 and above compression onto hard drive and on demand playback.
the boxes software
/********************************************************************
*
* SMT-H3110 For Virgin Media Project
*
* 1. This source tree uses stm23_0024.
* 2. "CONFIG_SAMSUNG" is used for SAMSUNG
* 3. "CONFIG_SMTH3110" is used for SMT-H3110
* 4. "CFG_ENV_IS_IN_BBML" is used for Dynamic Configuration
*
*********************************************************************/
#ifndef __CONFIG_H
#define __CONFIG_H
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_SH4 1 /* This is an SH4 CPU */
#define CONFIG_CPU_SUBTYPE_SH4_2XX /* its an SH4-202 */
#define INPUT_CLOCK_RATE 27
#define P_CLOCK_RATE 66000000 /* clock rate for CSP */
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
* Assume we run out of uncached memory for the moment
*/
#define CFG_SDRAM_BASE 0x84400000 /* SDRAM in P1 region */
#define CFG_SDRAM_SIZE 0x08000000
#define CFG_FLASH_BASE 0xA0000000
#define CFG_RESET_ADDRESS 0xA0000000
#define CFG_MONITOR_LEN 0x00020000 /* Reserve 256KB for Monitor */
#define CFG_MONITOR_BASE 0xA0000000
#define CFG_MALLOC_LEN (1 << 20) /* Reserve 1MB for malloc */
#define CFG_BOOTPARAMS_LEN (128 << 10)
#define CFG_GBL_DATA_SIZE 1024 /* Global data structures */
#define CFG_MEMTEST_START CFG_SDRAM_BASE
#define CFG_MEMTEST_END (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - (2 << 20))
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define XSTR(s) STR(s)
#define STR(s) #s
#define BOARD smth3110
/*--------------------------------------------------------------
* Default dynamic configuration values
*/
#define CONFIG_BOOTCOMMAND "vmboot"
#define CONFIG_BOOTARGS "console=ttyAS0,115200 mem=94m bigphysarea=3000 rw root=/dev/ram"
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootcodecmd=go a03a0000\0" \
"bootcodedelay=0\0" \
"runtest=tftp 84000000 bootcode.bin;go 84000000\0" \
"board=" XSTR(BOARD) "\0" \
"load_addr=" XSTR(CFG_LOAD_ADDR) "\0"
/*--------------------------------------------------------------
* Command Options
*/
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_ASKENV | CFG_CMD_NFS | CFG_CMD_PING | CFG_CMD_DHCP )
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
/*--------------------------------------------------------------
* Serial console info
*/
#define CFG_SH_ASC_SERIAL 1
#define CONFIG_CONS_INDEX 0
#if (CONFIG_CONS_INDEX == 0)
#define CONFIG_SH_ASC_BASE 0xb8032000ul /* UART2 */
#else
#define CONFIG_SH_ASC_BASE 0xb8033000ul /* UART3 */
#endif
/*---------------------------------------------------------------
* Ethernet driver config
*/
/*
* There are 3 options for ethernet:
* The onboard SMC91111
* The DB641 STEM card - this has two ethernet devices Port0 and Port1
* For STx7109 the onchip ethernet:
*/
#define CONFIG_DRIVER_NETSTMAC
/* Config for stb7109 ethernet driver */
#define CONFIG_STMAC_ADDRESS 0xB8110000ul
#define CONFIG_STMAC_RTL8201CP
/* If this board does not have eeprom for ethernet address so allow the user
* to set it in the environment
*/
/* #define CONFIG_ENV_OVERWRITE */
/*-----------------------------------------------------------------------
* Miscellaneous configurable options
*/
#define CFG_HUSH_PARSER 1
#define CFG_LONGHELP 1 /* undef to save memory */
#define CFG_PROMPT "SMT-H3110> " /* Monitor Command Prompt */
#define CFG_PROMPT_HUSH_PS2 "> "
#define CFG_CBSIZE 1024
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_HZ (P_CLOCK_RATE/1024) /* HZ for timer ticks */
#define CFG_LOAD_ADDR CFG_SDRAM_BASE /* default load address */
#define CFG_BOOTMAPSZ (16 << 20) /* initial linux memory size */
#define CONFIG_BOOTDELAY 0 /* default delay before executing bootcmd */
#undef CONFIG_ZERO_BOOTDELAY_CHECK
#define CONFIG_AUTO_COMPLETE
#define CONFIG_COMMAND_HISTORY
#define CONFIG_COMMAND_EDIT
/*-----------------------------------------------------------------------
* FLASH organization
*/
/* stb7100 mboard organised as 8MB flash with 128k blocks */
#define CFG_FLASH_CFI_DRIVER
#define CFG_FLASH_CFI
#define CFG_FLASH_PROTECTION 1 /* use hardware flash protection */
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CFG_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
/* For flash supporting individual zero-latency block locking scheme need uncomment
* the sigle cell define. */
//#define CONFIG_FLASH_PROTECT_SINGLE_CELL
/*-----------------------------------------------------------------------
* NVRAM organization
*/
/* Address and size of Primary Environment Sector */
#define CFG_ENV_IS_IN_BBML 1
#define CFG_ENV_SIZE 0x1000
#define DCONF_VERSION_1 1
//#define DCONF_VERSION_2 1
/*-----------------------------------------------------------------------
* Extra configuration
*/
#define CFG_CONSOLE_INFO_QUIET 1
/*-----------------------------------------------------------------------
* I2C Organization
*/
#define CONFIG_SOFT_I2C
#define CFG_I2C_SPEED 100000
#define CFG_I2C_SLAVE 0x00
#define IIC0_BASE 0xb8022000
#define IIC1_BASE 0xb8023000
#define IIC2_BASE 0xb8024000
#define I2C_INIT SET_PIO_PIN(IIC0_BASE,0,STPIO_OUT); \
SET_PIO_PIN(IIC0_BASE,1,STPIO_BIDIR); \
SET_PIO_PIN(IIC1_BASE,0,STPIO_OUT); \
SET_PIO_PIN(IIC1_BASE,1,STPIO_BIDIR); \
SET_PIO_PIN(IIC2_BASE,0,STPIO_OUT); \
SET_PIO_PIN(IIC2_BASE,1,STPIO_BIDIR);
#define I2C_READ ((readb(iic_base_addr+0x10)&0x02) != 0)
#define I2C_SDA(bit) if(bit) writeb(0x02,iic_base_addr+0x04); \
else writeb(0x02,iic_base_addr+0x08);
#define I2C_SCL(bit) if(bit) writeb(0x01,iic_base_addr+0x04); \
else writeb(0x01,iic_base_addr+0x08);
#define I2C_DELAY udelay(5)
#define I2C_TRISTATE udelay(1)
#define I2C_ACTIVE udelay(1)
/*-----------------------------------------------------------------------
* eeprom configuration
*/
#define CFG_I2C_EEPROM_ADDR 0x54 // 0xA8
#define CFG_EEPROM_PAGE_WRITE_BITS 8
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 4
/*-----------------------------------------------------------------------
* bootlogo
*/
#define CONFIG_KMS_BOOTLOGO 1
#endif /* __CONFIG_H */
